A clearer view of verification

One workspace.
Clearer insight.

From the first signal to the failing cycle.
A focused desktop workspace for verification, debugging, and clearer results.

Download for Windows

Windows desktop app · Installer available

VerifyDebugReviewOne connected view.
CycloSim / workspace_demo
INTERACTIVE SAMPLE
EXAMPLE DATA
+ | Resolution: 10 nsCursor 120 ns
SIGNAL VALUE
clk 1
rst_n 1
valid 1
ready 0
data[31:0] 0xA4
state[2:0] WAIT
Handshake sample at 120 nanosecondsThe clock has a 20 nanosecond period. Valid rises at 40 nanoseconds. Four cycles later, at 120 nanoseconds, ready is still low. Data is A4 and the bridge remains in WAIT, triggering the example bounded-latency assertion.0 ns40 ns80 ns120 ns160 ns0x00000x00A4IDLEWAIT
Handshake timeoutp_ready_within_4_cycles · handshake.sv:84
Sample run complete23 passed / 1 failedworkspace_test | 200 ns
Follow the signal. Understand the failure.Illustrative interface · product capabilities to be confirmed

Built around the way
verification engineers think.

Design context
Signal visibility
Actionable results

LESS SEARCHING. MORE UNDERSTANDING.

From a failing check
to the reason why.

Keep the design, its behavior, and the result in the same conversation. Explore the intended workflow below.

01 / ESTABLISH CONTEXT

Start with the whole design.

Navigate from the top-level system to the block and signals that matter to your investigation.

02 / FOLLOW THE BEHAVIOR

Make every cycle readable.

Compare transitions, inspect values, and connect an unexpected result to a precise moment in time.

03 / INVESTIGATE THE RESULT

Give a failure its context.

Bring the check, source location, and signal behavior together to guide the next debugging step.

A MORE CONNECTED VERIFICATION WORKSPACE.

See the behavior.
Understand the result.

What happened? Where did it happen? What should you investigate next?

Explore the sample workspace
01

Inspect

Bring signals, values, and design context into one view. Focus on the behavior that matters to your investigation.

CLARITY IN EVERY VIEW
02

Investigate

Follow an unexpected result to the relevant check and source location. Keep the evidence close as you explore.

FOLLOW THE EVIDENCE
03

Review

See the outcome of a run, identify gaps, and decide what deserves attention in your next verification step.

MAKE THE NEXT STEP CLEAR

THE DETAILS MATTER.

Clear expectations.
Before you begin.

This website includes the CycloSim Windows installer. The installed app connects securely to the CycloSim service for account access, payments, and licensed features.

What can I try in this preview?

Switch between waveforms, an assertion failure, and sample coverage results. Follow the guided walkthrough to see how the views connect. All values are illustrative.

Which languages and tools are supported?

CycloSim is a Windows desktop workspace for RTL, Verilog, SystemVerilog, UVM, simulation, and waveform debugging.

Is a desktop installer available?

Yes. Download the Windows installer from the download section, install it, and sign in inside the app.

Does this run real verification?

Yes. The installed CycloSim app provides the desktop workspace and connects to its hosted services for licensed features.

CYCLOSIM FOR WINDOWS

Your workspace.
On your desktop.

Download, install, and open CycloSim on your PC. A dedicated verification workspace for inspecting behavior, investigating issues, and reviewing results.

Windows installer available
Explore the sample workspace

CycloSim Desktop

Windows installer

AVAILABLE
Platform
Windows PC
Version
0.1.1
Installer size
Windows x64
System requirements
Windows 10 or later
Download for Windows

Install CycloSim Labs, then open the app to sign in and activate access.

ONCE THE APP IS RELEASED

From download to desktop.

  1. Download

    Get the Windows installer from this page.

  2. Install

    Open the installer and follow the setup steps.

  3. Launch

    Open CycloSim from your Start menu.

GUIDED SAMPLE
01 / 03

Start with the handshake.

In this example, the sample raises valid to request a transfer. The test expects ready within four cycles. That limit belongs to this sample check, not a general verification rule.

valid = 1   →   waiting for ready